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Port A bit 7 can be configured as either a general-purpose input or output using the DDRA7 bit in the pulse accumulator control register. When port B is being used for general purpose output, it is configured as output only and reads of these lines will return the levels sensed at the input of the pin drivers. Port E contains the eight A/D channel inputs, but these lines may also be used as general purpose digital inputs. Writes to the port E address have no effect. 3 Simple Strobed I/O The simple strobed mode of parallel l/O is invoked and controlled by the parallel l/O control register (PIOC).
1 Programming and Erasure of the CONFIG Register Since the CONFIG register is implemented with EEPROM cells, special provisions must be made to erase and program this register. The normal EEPROM control bits in the PPROG register are used for this purpose. Programming follows the same procedure as programming a byte in the 512-byte EEPROM except the CONFIG register address is used. Erase also follows the same procedure as that used for the EEPROM except that only bulk erase can be used on the CONFIG register.
MC68HC11A8 TECHNICAL DATA SERIAL COMMUNICATIONS INTERFACE MOTOROLA 5-13 5 5 MOTOROLA 5-14 SERIAL COMMUNICATIONS INTERFACE MC68HC11A8 TECHNICAL DATA 6 SERIAL PERIPHERAL INTERFACE This section contains a description on the serial peripheral interface (SPI). 1 Overview and Features The serial peripheral interface (SPI) is a synchronous interface which allows several SPI microcontrollers or SPI-type peripherals to be interconnected. In a serial peripheral interface, separate wires (signals) are required for data and clock.